Copello are looking for a FPGA Engineer to join a defence organisation on an initial 6 month basis. As the FPGA Verification Engineer You be required to undertake FPGA verification activities in line with DO-254 including * Physical (lab-based) test authoring and reviewing. * Assessment of elemental analysis and code coverage. * Scripting to aid test development, test result analysis or management of traceability data. * Owning and carrying out various aspects of verification activities as requested by the technical leads. * VHDL code reviews. The FPGA Verification Engineer will require the following experience: Desired characteristics: * Very strong VHDL knowledge, particularly for verification (including testbenches and score boarding). * Strong background in FPGA design. * Experience of DO-254 verification activities. * Knowledge of a range of scripting languages, e.g. Python, tcl. * Questa/Modelsim experience. * Knowledge of standard aviation communication protocols, such as ARINC429, would be a bonus. * Lab skills, including debugging/problem solving. This role will require the candidate to work on site on an hybrid basis. Role is paying up to £75 per hour (inside IR35)